Friday, December 22, 2006

Etching of high k dielectrics

One of the main requirements for etching of high k dielectrics is excellent selectivity to silicon. For logic gates, this translates into the request for zero silicon recess in the source / drain area. During HfO2 deposition a thin SiO2 interfacial layer is always formed between the silicon substrate and HfO2 layer. This means that in order to achieve zero recess, one has to stop on this very thin silicon oxide interface layer.

Using a Cl2/CO gas chemistry at low pressure, high wafer temperature and without bias power applied to the wafer, the HfO2 etch rate is about 100 A/min and the selectivity towards SiO2 is about 20 (slide 1). The process is very sensitive to the ion energy: at 25 W bias power, the selectivity towards SiO2 drops to less than 3.

XPS analyses show that without bias power applied to the wafer, the HfO2 layer is free from any deposits, i.e. etches, while a CClx layer is formed on SiO2. This means that the selectivity towards SiO2 is obtained thanks to the formation of the CClx deposition layer on top of the thin interfacial SiO2 layer.

Slide 2
shows the integration of HfO2 polysilicon and oxide hardmask on a patterned wafer. The film stack is comprised of 40 nm thick SiO2 HM, 100 nm polysilicon and 3.5 nm HfO2. The wafers were patterned using e-beam lithography. High resolution TEM pictures of the etched structures are shown. The gate exhibits a straight profile with a slight notch at the bottom of the gate. This results show that the high temperature HfO2 etch process does not induce any profile distortion of the silicon gate. A HfO2 foot at the bottom of gate requires more process optimization. The silicon recess is approximately 3 nm.

Slide 3 shows the bias power dependence of a BCl3 based low temperature high k etch process. At 800 W source power, Si and SiO2 show deposition of BClx based polymers for bias powers between 0 and 7 W and etch above bias powers of 7 W. HfOx etches for all bias powers which results in an infinite HfOx to Si and SiOx selectivity for bias powers between 0 and 7 W. It is quite obvious that the bias power had to be very well controlled for this process. Also, even small deviations in the crystalline structure or composition of the HfOx material (for instance additions of Ak or Zr) can lead to dramatically reduced selectivities and residues. In this respect, the high temperature process has a larger process window.

The etch rate observations for the BCl3 room temperature process in slide 3 can be corroborated by XPS surface composition studies of SiOx and HfOx (slide 4). The surface of SiOx shows a deposition layer for SiOx for 0 and 10 W bias power. The layer is thicker for 0 W. The deposition layer for HfOx at 0 W is similar to the layer on the SiOx surface at 10 Wb. At 10 W, only traces of B and Cl can be found on the HfOx surface which is indicative of a surface that has been etched.

The BCl3 room temperature process is quite sensitive to chamber wall effects. Slide 5 shows how the SiOx etch rate changes as a function of chamber wall coverage for 10 Watt bias power: carbon coated vs. SiOxCly coated vs. cleaned walls (AlFx). When the chamber walls are coated with carbon, etch stop occurs due to polymer deposition. This is important when complex stacks are being etched. The same recipe may show good selectivity after a fluorocarbon based etch step and show punch through after a dry clean or HBr/Cl2 based silicon etch.

Slide 6 shows the same experiments as slide 5 for the etch rates of HfOx. The rate is the highest for the clean wall, followed by the carbon coated wall. The etch rate for the SiOxClx coated wall is much lower but etch stop does not occur. Note that for the SiOx layer, carbon coating had the strongest effect on etch rate suppression. One possible explanation is that carbon coated chamber walls are loading chlorine species leading to an increase of the BClx layer thickness on top of the HfOx due to the absence of etching species.

Slide 7 shows a metal gate / high k stack containing poly-Si on top of TiN followed by WN on HfOx. Zero silicon recess was achieved with the room temperature BCl3 process. The WN profile is tapered and required some more process optimization.

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Etching of Metal Gates

After several years of intensive research, the IC industry is about to introduce metal gates for logic devices. New materials carry significant risks for manufacturability and reliability which seem to be justified by their benefits. Metal gates can reduce the depletion effect in p-Si, decrease the gate resistivity and minimize the dopant diffusion (slide 1). For the 45 nm node and below, the industry may move from the dual doped polysilicon gates to various types of metal gate architecture. In the mid gap approach, a single metal such as TiN can be used. In the dual metal gate architecture, one n-type metal (for instance TaN) and a p-type metal (for instance WN) will be used. In the following study, we focus on the formation of TiN and TaN metal gates via substractive formation by plasma etching.

Another application of novel materials is the use of high k materials for metal gates. When the length of the gate decreases, the gate oxide capacitance must increase. With SiO2 this is achieved by decreasing the SiO2 thickness. This eventually leads to exceedingly high leakage currents which are induced by electron tunneling through the gate oxide (slide 2).

High k dielectric materials are introduced to obtain the same gate oxide capacitance with a thicker dielectric layer which in turn allows much less leakage current.

In this work, we have studied the formation of advanced transistor gates with hafnium based dielectric materials.

The main challenges for etching of metal gates and high k dielectrics are shown in slide 3 for a typical gate stack with 3 nm high k, a 10 nm thick metal layer a 50 to 100 nm thick polysilicon layer on top.

The first steps of the process are devoted to the formation of a thin hard mask such as SiO2 or amorphous carbon. The gate stack (p-Si and metal) is patterned with specific steps to preserve the gate dielectric integrity. In a final step, the high k dielectric layer is removed using soft plasma conditions to minimize the silicon recess.

In this sequence of etch steps, the main challenge is to obtain sub 30 nm gate structures with a CD control better than 2 nm across 300 mm diameter wafers.

Slide 4
shows the experimental setup which uses an industrial 200 mm etch platform with two ICP sources (Applied Materials DPS HT and DPS Plus). Both chambers are used for the etching of silicon, metal and oxide materials. The main difference between these two chambers is the chuck temperature. The DPS Plus operates at chuck temperatures between 10 and 80 °C and the DPS HT reaches temperatures between 150 and 300°C. A real time process control is possible using interferometry and optical emission.

An XPS surface analysis chamber is connected to the etch platform allowing quasi in situ analysis of etched wafers. This is a very powerful technique giving the chemical and surface composition of the reactive layers formed during plasma exposure.

In-situ XPS allows the the analysis of chamber wall deposits via air gap technique (slide 5). A sample representing the chamber material (for instance Al2O3 or Y2O3) is mounted on top of a carrier wafer. The gap height is chosen such that the bias at the sample surface is reduced to a value equal to the selfbias at the reactor walls (typically 15 eV). When the plasma is turned on, the wafer surface is etched and the reaction by-products get deposited at the sample surface. The composition of the deposits can be analysed quasi in-situ after the wafer is transferred to the analysis chamber without breaking vacuum.

Metals can be etched with halogen gas mixtures. Titanium forms volatile chlorides and bromides while titanium fluoride is relatively less volatile. Like in the case of silicon etching, oxygen addition can provide a means for effective sidewall passivation. However, when oxygen is used for etching titanium or titanium nitride, residues can readily be observed (slide 6). In situ XPS analysis reveals, that the residues are comprised of titanium oxides. The formation of oxides which are hard to remove is fairly common in etching of various metals. Oxygen as a passivation gas has to be used very carefully or avoided altogether.

Slide 7 shows, that when HBr is the main etch gas in a HBr/Cl2 gas mixture, sidewall passivation is obtained without the addition of any oxygen (note tapered TiN profiles. With careful optimization of the HBr/Cl2 ratio, good selectivities towards HfO2 and a good CD control can be obtained. However, a slight notch is observed at the bottom of the silicon part of the gate. Partitioning experiments revealed, that the notch is formed during the TiN etch process. The formation of this notch will be studied in the following.

XPS analysis of the polysilicon sidewall before and after the TiN etch step reveals significant differences in the composition of the sidewall (slide 8). Before TiN etching the sidewall contains 21% silicon atoms bound not to other silicon atoms, 32% oxygen, 15% chlorine and 7% bromine atoms, i.e. it is comprosed of silicon oxyhalogenides. After the TiN step, the thickness of the passivation layer is significantly reduced (poly-Si signal increased from 25 to 53%). The formation of the notch at the silicon / TiN interface can be attributed to the erosion of the passivation layer during TiN etching in oxygen free chemistries. The passivation payer formed on the silicon didewalls must be preserved during metal etching.

Slide 9 shows how the choice of an appropriate polysilicon etch chemistry provides better compatibility with the TiN etch process. Two silicon etch chemistries have been compared: a traditional HBr/Cl2/O2 process and a fluorine based SF6/CH2F2 process where the passivation is achieved by fluorocarbon polymer formation on the sidewalls. The results indicate, that the fluorocarbon pasivation provides much better protection than the silicon oxyhalogenide passivation of the traditional gate etch process. The metal etch chemistry is driving the choice of the polysilion gate etch chemistry.

Tantalum nitride can be etched with HBr. Depending on the process conditions, very thick sidewall passivation layers can be formed on the tantalum and polysilicon layers (slide 10). This can lead to tapered TaN profiles.

The composition of the sidewall layer after etching of TaN with HBr can be measured directly with XPS or be derived from the composition of the chamber wall deposits. XPS studies were performed with the air gap method to identify the coatings formed on the chamber walls. Slide 11 shows that after silicon etching, a thin SiOxCly deposit is formed on the chamber walls. After TaN etching, a thick TaOxBry layer coats the reactor walls demonstrating that heavy non-volatile Ta based etch by-products are deposited on all the surfaces exposed to the plasma.

To avoid very thick Ta based chamber wall and sidewall deposition, chlorine and fluorine based chemistries seem to be promising. Slide 12 shows that more vertical profiles be achieved with a Cl2/CF4 mixture. In low pressure CF4/Cl2 plasmas, almost vertical TaN profiles and good selectivity to HfO2 are obtained. However, the presence of fluorine in the gas phase induces a severe profile deformation in the top silicon part of the gate, indicating that the SiOxBry based passivation formed on the silicon sidewalls is completely removed by fluorine species.
These results highlight the critical importance of the compatibility between the etch chemistries used to pattern the top silicon part and bottom metal part of the gate stack.

Slide 13
shows results of etch chemistry studies for a polysilicon / WN stack. The polysilicon has been etched with a traditional HBr and Cl2 based process where the sidewall passivation is achieved via the formation of silicon oxyhalogenides. The TEM’s show that a Cl2 based WN process produces a strong WClx layer which gets deposited on the polysilion profile and provides additional passivation. The resulting WN profile is tapered. When CF4 is used to etch WN, the free fluorine removes the polysilicon sidewall passivation layer and start to etch sideways into the polysilicon. The WN is also tapered, either because of a lack of directionality (isotropic etch) or because of the passivating effect of carbon. The Cl2 based WN etch is the better choice but needs to be optimized to obtain directionality.

Slide 14 shows the compositions of chamber wall deposits for WN and WSix etched with fluorine, chlorine and bromine based chemistries. When WN is etched with an SF6/CH2F2 mixture, an AlFx layer is formed. The etching of WSix with chlorine generates WSixCly deposits while HBr forms a very thick WBrx layer on the chamber walls. The thickness of the chamber wall deposition correlates roughly with the volatilily of the etch by-products. In any case, appropriate waferless dry cleans have to be developed to avoid by-product accumulation and particle generation.

The dry clean recipe has to be designed for each metal material / etch chemistry combination. Slide 15 shows that SF6/O2 dry cleans remove TiOxCly deposits which were formed when TiN was etched with a Cl2/O2 process. In the process, AlFx is formed on the chamber walls. An CF4/Cl2 mixture removes TaOxBry residues from etching of TaN with an HBr chemistry. The dry cleans also needs to take into condiration residues from other layers of the gate stack, for instance BARC, hardmask and polysilicon layers.

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Saturday, December 9, 2006

Silicon Etch Refined

December 4, 2006
Applied Materials introduces Centura AdvantEdge G3 Silicon Etch for advanced memory and logic applications. AdvantEdge G3 improves wafer temperature tuning to offer both a greater range of center-to-edge thermal gradients and better temperature uniformity. An increase in ramping rate facilitates rapid step-to-step optimization over a wide temperature range.

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Metal Etch Redefined

December 5, 2006
Applied Materials, Inc. today announced its new Applied Opus(TM) AdvantEdge(TM) Metal Etch, the industry's fastest, most advanced system for etching sub-70nm aluminum interconnects in leading-edge Flash and DRAM memory devices. The system removes a critical etch bottleneck for customers by employing a process-optimized 5-chamber configuration (3 etch, 2 strip). Compared to standard 4-chamber metal etchers, the Opus AdvantEdge delivers 50% better critical dimension (CD) uniformity, a 2x faster strip rate with enhanced corrosion resistance, and 50% higher throughput - while still maintaining a standard etch bay footprint.

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Friday, December 8, 2006

Resist Trimming

The need for resist trimming arises from the gap between the line widths advanced lithography can print today and the desired gate length of the transistor. For the 90 nm technology node, the printed line width is typically somewhere between 90 and 100 nm and the final gate length 50 to 60 nm. Hence, a line width reduction has to be achieved at some point in the process flow, typically during the first step of the gate patterning etch (slide 1). The requirements for this so called resist trim step are: no deterioration of the critical dimension (CD) uniformity across wafer, adjustable dense / iso CD bias, line integrity (no resist bending or line clipping), adjustable aspect ratio of post trim resist shape, linear dependence of the CD reduction on trim time (i.e. linear trim curve).

Oxygen is the main etch gas in many resist trim processes because oxygen based plasmas etch polymers isotropically. Halogens such are HBr, HCl, Cl2 or fluorocarbon gaeses are added to provide control over the ratio of lateral vs. vertical etch rate. These gas additives inluence the trim rates for the dense and isolated lines. It iwas found that the trim rate is faster in HBr/O2 chemistry than in Cl2/O2 chemistry. Larger difference in trim rate between dense and isolated lines are found for the HBr/O2 chemistry (slide 2).

With HBr and HCl, the trim rate is faster in isolated than in dense resist patterns. Cl2/O2 chemistries result in a trim process which is faster in dense resist lines than in isolated resist lines (slide 3).

The effect of bromine and chlorine addition to an oxygen based trim process wass studies with in situ XPS (E. Pargon, O. Joubert, T. Chevolleau, G. Cunge, Songlin Xu, Thorsten Lill; JVST B, 23 (2005) 103). In HBr/O2 plasmas, very little Br concentrations are found on all resist surfaces exposed to the plasma. O only is involved in the resist transformation. Br is not reactive with respect to carbon. Thin reactive layers are typical of a very chemical type of etch. In Cl2/O2 plasmas, large chlorine concentrations are found on top and sidewall of the resist patterns indicating a competitive absorption between O and Cl. The increase in reactive layer thickness on the resist sidewalls with Cl2/O2 indicates that it is formed from resist etch products redeposition (slide 4).

For O2/Cl2 trim processes, the composition of the reactive layers changes when the O2 concentration in the gas phase is increased. The Cl concentration and thickness of the the top reactive layer decrease. The Cl concentration and thickness of the reactive layer on the resist sidewall decrease and the O/Cl ratio increases. A direct correlation between trim rate, O/Cl ratio and thickness of the reactive layer on the resist sidewalls exists (slide 5).

For O2/HBr trim processes, very little difference in reactive layer composition and thickness as a function of O2 concentrations was found. A slow down in trim rate at low O2 concentration (10% in HBr/O2) may be attributed to the presence of Br in the sidewall layer. At higher O2 concentration (60%), no bromine is present on the resist sidewalls, the trim rate increases by more than 50% (slide 6).

The pressure dependence of the Cl2/O2 trim process is shown in slides 7 and 8. An increase in pressure in Cl2/O2 generates a slow down in trim rate in dense as well as isolated resist patterns. The composition of top resist patterns is not affected by the change in pressure. For the sidewalls of the resist patterns, an increase in chlorine concentration, decrease in oxygen concentration and increase in reactive layer thickness is observed. This is consistent with the decrease in trim rate as a function of pressure.

Similarly to the Cl2/O2 chemistry, an increase in pressure of the HBr/O2 gas mixture generates a decrease in trim rate in dense as well as isolated resist patterns. XPS shows no difference in reactive layer formation in dense resist patterns as a function of pressure of the HBr/O2 gas mixture (slide 9).

In Cl2/O2 plasmas, increasing bias power has the same impact than increasing pressure: the trim rate decreases in dense as well as isolated lines (slide 10).

XPS studies of the active layer showed the following trends for increasing bias power in Cl2/O2 plasmas: 1. The top resist patterns not affected by the increase in bias power, their composition is only driven by O2/Cl2 ratio, 2. The idewalls of the resist patterns exhibit an increase in chlorine concentration, a decrease in O concentration and an increase in reactive layer thickness consistent with the decrease in trim rate as a function of bias power, and 3. the deposition of carbon etch products increases with bias power (slide 11).

Similarly to Cl2/O2, increasing bias power in HBr/O2 leads to a decrease in trim rate for both isolated and dense lines. An increasing bias power generates a decrease in trim rate difference between isolated and dense lines whereas there is almost no effect in Cl2/O2 (slide 12).

In summary, resist trimming is a very powerful and widely used method to achieve gate lengths which are beyond the resolution limits of photolithography. The trim process is chemical in nature and very dependend on the choice of gases. Slide 13 shows some of the limits of the resist trim process. Firstly, resist consumption and internal stress leads to profile deformation (resist bending). Secondly, initial resist roughness (line edge roughness) becomes a problem after ultimate trim.

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Thursday, December 7, 2006

Shallow Trench Etch Bottom Corner Rounding

The method for achieving the desired bottom corner rounding depends sginificantly on the chemistry used for shallow trench etching. Chlorine based plasmas show a tendency for microtrenching, while HBr based plasmas result more easilty in square or rounded trench bottoms (slide 1).

For the HBr based process, the trench bottom becomes more rounded when the pressure is increased (slide 2) and the ion energy is increased.

For chlorine based plasmas, a significant bottom corner can be obtained by oxygen addition. Silicon oxychloride is formed on the trench sidewall. For sufficiently high oxygen flows, this passivation layer can extend towards the etch front and eliminate the microtrench. When too much oxygen is added to the gas mixture, the oxide layer starts to cover the etch front. Chlorine can attack the silicon only in a few areas which causes bottom roughness (slide 3).

The bottom corner rounding for chlorine based plasmas can be controlled by adjusting the pressure and the oxygen flow (slide 4).

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Shallow Trench Etch Top Corner Rounding

The motivation for forming rounded corners at the top of the shalllow trench is based on the fact that any sharp corners result in poor gate oxide quality. The gate poly-Si can wrap around the top corner, which can create a parasitic conduction path (slide 1).

Slide 2 shows two different approaches for the formation of rounded trench tops, the carbon polymer based approach and the silicon etch by-product based approach.

Resist striation is a challenge for the carbon polymer based approach. Top of resist is roughened during mask open etch. High bias power required during the mask overetch and the trench etch steps can lead to faceting of the resist. The roughness on the top of the resist can become transferred to the sidewall. More faceting leads to striations in the sidewall can extend to the nitride sidewall. Nitride mask striation leads to silicon striation (slide 3).

Both approoaches are compared in slide 4.

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Fundamentals of Shallow Trench Etching

The process performance requirements for shallow trench etch are very unique and depend very much on the specifics of the device (slide 1).

Depending on the mask scheme (resist or hardmask), chlorine or hydrogen bromide based plasmas can be used to etch shallow trenches (slide 2).

For both chemistries, the tapered profile is achieved by the formation of sidewall passivation layers comprised of oxyhalogenides which are the by-products of the etch process. The sidewall passication is typically thicker in the case of HBr processes. There is evidence that direct surface oxidation plays a role in the case of chlorine processes while backsputtering of reaction by-products is the primary mechanism in the case of HBr (slide 3).

These differences in the etch mechanism lead to significantly different profile and etch rate microloading (slide 4).

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